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Tag Archives: EDA360
Spreadtrum tapes out 40-nm LP chip using Cadence Silicon Realization
PARIS – Subject to time-to-market factors, Spreadtrum Communications Ltd. (Shanghai, China) has adopted Cadence’s Silicon Realization products for the design of a 40-nm low power TD-HSPA/TD-SCDMA multi-mode communication baseband processor. The chip was taped out with one-pass silicon success and … Continue reading
Posted in Technology, Wireless, Work
Tagged 3G, 40nm, baseband, Cadence, Cadence Silicon Realization, China mainland, chipset, compiler, DFM, EDA, EDA360, EDGE, GPRS, GSM, IC design, low power, processor, RTL, SC8800G, simulator, SMIC, SoC, spreadtrum, TD-HSDPA, TD-HSPA, TD-HSUPA, TD-LTE, TD-SCDMA, verification, WCDMA
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